Coding system for minimizing digital data bandwidth

ABSTRACT

A digital compression system including a superresonant filter, which adds samples of a digital data signal at a frequency to previous samples. The added samples are parts of sine or cosine waves, not the sum of the waves. The output signal is actually the summation of the samples. The samples are made during at most a single period.  
     The disclosed superresonant filter has a settling time significantly faster than prior art narrow band filters. Prior art narrow band filters passing approximately 1 Hz require approximately 1 second to settle. The disclosed superresonant filter passing 1 Hz will settle in approximately 1 microsecond.

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based on and incorporates herein byreference, provisional patent application Nos. 60/440,952, filed Jan.17, 2003; 60/440,951, filed Jan. 17, 2003; 60/440,954, filed Jan. 17,2003; and 60/440,955, filed Jan. 17, 2003.

BACKGROUND OF THE INVENTION

[0002] It is known that the sum of sine waves of equal amplitudes but offixed phase difference between each member is:${\sum\limits_{0}^{n - 1}\quad ^{j{({{wt} + {n\quad \Delta \quad \varphi}})}}} = {\frac{\sin \left( {\left( {n\quad \Delta \quad \varphi} \right)/2} \right)}{\sin \left( {({\Delta\varphi})/2} \right)}^{j\quad \omega \quad t}}$

[0003] where ΔΦ is the phase difference between the members which can bevisualized as vectors. This sum can be formed from the input to atransmitter by adding inputs phase shifted by ΔΦ to the input as shownin FIGS. 1A, 1B and 1c. We assume here that the signal input, e^(jωt)are configured to sum with the amplitude in each path (branch).

[0004] In FIG. 1A, Item 1 is a channel filter allowing a band offrequencies to be received and supplied to the summer 2. The output ofthe adder is phase shifted in 3, which is a phase shifting device thephase shift of which is a function of frequency. The output of 3 isswitched on or off by 4 in accordance with a control signal which may bedata or timing bits. The switch output is fed back to the summer 2 andadds to the input in a phased manner as shown in vector form in FIG. 1B.That figure assumes there is no time delay around the loop.

[0005] If now the ΔΦ's in the branches (paths) are made functions of thefrequencies of input signals in the same manner as was done in thetransmitter, the paths are independently responsive to the incomingsignals according to their frequencies. Thus, an incoming group ofsignals to the sender is enhanced by the arrangement of FIG. 1A. Theinput signals remain substantially unchanged during this summing. ForΔΦ=0 the output is n=60 but for ΔΦ greater than π/n the magnitude isclose to 0. A resulting plot for n=60 is shown in FIG. 1C. This plotshows that for. ΔΦ=0 the output is n=60 but for ΔΦ greater than π/n themagnitude is close to 0. Thus, a group of such paths phase shifted 2π/nfrom each other not typically interfere with each other. A switchedphase inverter is connected to each independent phase path to controlthe built up signals in each path by inserting a 180° phase shift underthe control of an information bit. When this is done, the summer becomesa subtractor and eliminates signal from that path. FIG. 2 shows such anarrangement for sending such bit controlled incremental phased signals.

[0006] The system consists of a transmit and receive location in each ofwhich there are several branches. Phase shifters 101, 101 a, 101 b, . .. 101 n are located in each of the transmit station branches. Each ofthese phase shifts ΔΦ₁, ΔΦ₂, . . . ΔΦ_(n), varies distinctively withfrequency. Switched Inverters 103, 101A, 101B, . . . 103 n are also inthe respective branches. These switches are responsive to controlsignals from coder 100 which supplies different digital control pulsesequences to the individual branches. These switches may invert thephase of the branch signal, as stated above, or simply turn the branchon and off in accordance with the control signal. The timing iscontrolled by the clock 102. The outputs of all the branches aresupplied to the adder 200 which also receives a band of signals fromfilter 106. This band of signals, Σ₁ cos ω₁ t, Σ₂ cos ω₂ t, . . . Σ_(n)cos ω_(n) t, may originate from noise or a return path from thereceiver.

[0007] Filter 114 represents the transmission channel bandpass. A groupof frequencies selected by the transmitter process is supplied to adder205, which sums this input with all of the outputs of the receiverbranches. The output of 205 goes to all of the branches. Phase shifters116, 116 a, 116 b, . . . 116 n are similar to 101, 101 a, 101 b, . . .101 n and provide corresponding phase shifts for the same frequency ofthe corresponding transmitter branch. Units 140, 140 a, . . . 140 nlimit the build up of signal in the branches. This is done by openingthe channel for bit length periods only controlled by clock 102 a. Bitsare detected by amplitude detectors 130, 130 a, . . . 130 n when thebuilt-up signals exceed a threshold. As shown in FIG. 2, gates 132, 132a, . . . , 132 n enable signal flow to respective amplitude detectors130, 130 a, . . . , 130 n while enabling simultaneous control oflimiting units 140, 140 a, . . . , 140 n in accordance with the clock102 a. Clocks 102 and 102 a are synchronized. Amplifier 115 may be usedto offset transmission loss between receiver and transmitter.

[0008]FIG. 3 shows the operation of the oversampled digital spikebandpass filter. Each symbol (1 MHZ symbol rate) received from thetransmission channel is gated and used as the input to the spikebandpass filter. The gated symbol stored in buffer 351 is repeatedlyclocked out at 100 MHZ rate. That is, the repeated symbols appear at aoversampled symbol rate of 100 MHZ at the input of the digital spikefilters 352 and 352A. The last symbol of the output of the digitalfilters after a stable symbol recovery are gated out and the last noisesymbol of 352A is subtracted from the signal plus noise symbol insumming amplifier 353 and stored in buffer 354. The stable outputappears at the end of 1 microsecond. The samples in the symbol are thenread out at 1 MHZ rate from buffer 354, which is the symbol ratereceived from the sending side. This signal Y(t) is used as the input tocounter 308 and computer 309 to develop DVx and Dvy components. Theoperation of the spike filters is entirely the same as previouslydescribed except that the noise filter 352A is tuned 1 kHz from thesignal filter 352.

[0009] A simpler oversampled digital spike filter may be employed thanthe standard FIR. As shown in FIG. 4, it consists of a single delay unit355. The output of the delay unit 355 is summed in adder 356 with theinput so that the output is:

[0010] E_(n)=e_(n)sinωt+e_(n-1)(wt+τ₀) where τ_(o) is the delay of unit355. This signal is fed back to adder 357 where it adds to the incomingsignal e. The successive summation after n iterations results inE_(n)=(sin n ωτ_(o)/sin ωτ_(o))e^(jωto), where ω=2πf. When f=f_(o),2πf_(o), τ_(o) 2π, the magnitude of E_(n) will=n, the maximum value, andthe nulls occur at frequencies n±f_(o)2n from f_(o) which defines thebandwidth of the filter. Thus, this system is a narrow pass filter. Afilter tuned to the null frequency of 355 provides the noise subtractingsignal. This filter is composed of delay 355A and adders 356A and 357A.Subtraction takes place in summation amplifier 358. However, the circuitshown in FIG. 4 has an inherent disadvantage in that the sampling rateis limited by the Q of the analog resonant circuit.

SUMMARY OF THE INVENTION

[0011] The invention described in this patent application is a digitalcompression technology for increasing the data throughput oftelecommunications and broadcasting networks. The invention isapplicable to telephone networks, including telephone twisted-pairwiring but not limited to it; coaxial cables for telephony, datatransmission and video transmission with or without accompanying sound;microwave, cellular, mobile and personal communications networks; radioand satellite systems. The invention applies to multimedia applicationsin all of the above components of telecommunications and broadcastnetworks.

[0012] The inventive system compresses bandwidth to allow for minimumenergy transmission by reducing the spectrum of the data. Each symbolperiod contains one sinusoid of a specific amplitude. Sampled inputs,samples of sine or cosine waves, vary in amplitude. The disclosedsuperresonant filter adds new samples to previous samples. It should benoted that the added samples are parts of sine or cosine waves, not thesum of the waves. While the output signal appears to be a spike, it isactually the summation of the samples. Each sample is slightly differentin phase from the previous sample. As each sample is added to theprevious sample, the effective bandwidth is lessened and the overallsignal amplitude is increased. Each iteration has a slightly differentphase except in the case of optimum performance where the phase is zero.

[0013] The disclosed superresonant filter has a settling timesignificantly faster than prior art narrow band filters. Prior artnarrow band filters passing approximately 1 Hz require approximately 1second to settle. For example, the disclosed superresonant filterpassing 1 Hz will settle in approximately 1 microsecond.

BRIEF DESCRIPTION OF THE DRAWINGS

[0014]FIGS. 1a and 1 b show a phased summing method;

[0015]FIG. 1c shows the resulting output of the phase summing methodversus vector phase difference ΔΦ for n=60;

[0016]FIG. 2 illustrates a block diagram of a system employing the phasesumming method;

[0017]FIG. 3 is a schematic diagram of the use of oversampled digitalspike filter;

[0018]FIG. 4 is a schematic diagram of the use of a recursive type ofover-sampled digital spike filter;

[0019]FIG. 5 is a schematic diagram showing spectral compression;

[0020]FIG. 6 is a block diagram of a minimum energy information sender;

[0021]FIG. 7 is a sin input pulse wave shape of TX sender ofinformation;

[0022]FIG. 8 is an output wave shape of TX sender;

[0023]FIG. 9 is a block diagram of a minimum energy receiver;

[0024]FIG. 10 is a block diagram of a superresonant filter;

[0025]FIG. 10a is another embodiment of a superresonant filter;

[0026]FIG. 11 is a block diagram of a modified superresonant filter;

[0027]FIG. 12 is a block diagram of an exploded suppressed carriersuperresonant filter;

[0028]FIG. 13 is as block diagram of an exploded suppressed carriersuperresonant filter;

[0029]FIG. 14 is a graph of the spectrum at each node of an ESC-SRF;

[0030]FIG. 15 is a graph of the spectrum at each node of an ESC-SRF;

[0031]FIG. 16 is a graph of the spectrum at each node of an ESC-SRF;

[0032]FIG. 17 is a graph of the spectrum at each node of an ESC-SRF;

[0033]FIG. 18 is a block diagram of a canceling receiver.

DESCRIPTION OF PREFERRED EMBODIMENTS

[0034] Bits transferred at a given rate require a channel bandwidth W.The bits are transferred in timed pulses. The required bandwidth Wallows the reception of white noise of the same bandwidth. The whitenoise increases in power directly with the bandwidth W. The informationpulse is stronger in power than the received noise power by a multipleto insure error free reception of a prescribed quality. The multiple isactually the signal-to-noise ratio (SN ratio). The prescribed quality isthe bit error rate. As is apparent, the power required to transmitinformation increases with the pulse power and the pulse rate.

[0035] For example, a one megabit per second information rate isequivalent to a pulse 1 MHz wide. When multiple amplitude levels areemployed, more information can be sent within the same bandwidth W.Thus, it is possible to reduce the power required to transmitinformation at any given rate by reducing the power in the spectrumneeded by the information pulse. When the pulse spectrum is transformedto an equivalent line spectrum, it retains the same time duration as theinformation pulse.

[0036]FIG. 5 shows a compression of the spectrum. The hemisphere 70drawn between 0.5 MHz and 1.5 MHz represents the spectrum of aninformation pulse as presently transmitted. The vertical line 72 at 1MHz represents the ideal spectrum as transmitted by the disclosedprocess. The horizontal line 74 at approximately −100 dBm/Hz is thenoise floor.

[0037]FIG. 6 is a block diagram of a minimum energy information sender.As shown, signals at multiple frequencies can be transmittedsimultaneously. Each frequency can be used to transmit multiple piecesof information. At any given frequency, information can be transmittedon the sine and cosine waves of this frequency. As such, TX1 generatedat 801 is transmitted on the sine of F_(o) in block 801. Likewise, block802 transmits TX1 on the cosine of F_(o). The sine and cosine offrequency F_(o) can be sent and detected during the same bit interval.

[0038] The sine input from 801 is processed by super-resonant filter(SRF) 805. The SRF employs a locally generated sine generator operatingat F_(o) in phase with the incoming sine signal. SRF 806 has a localcosine generator operating in phase with the cosine signal generated at802. Adder 807 linearly adds the signal generated by each of thesuper-resonant filters. Amplitude adjustors G_(t) 803, 804, adjust theamplitude of the signal output by the signal generators and input to theSRFs.

[0039] For modeling purposes, a noise signal is added to the combinedsignal 810. The combined signal 810, output from adder 807, is added toa noise signal 809. The noise signal is, in one embodiment, a constantamplitude signal in the range of 0.5 MHz to 1.5 MHz. This signal iscreated using a random number generating operating at 100 MS/sec. Thissignal is then fed to the bandpass filter. The system output signal 810plus the noise 809. In one embodiment of the invention, the filterednoise source is pre-calculated and stored in a file for a consistentnoise time wave formula. Further, for analysis purposes, all nodes areobservable with a time/waveform power meter.

[0040] As shown in FIG. 6, the amplitude adjustors are used in theprocessing of the signal. Each sine and cosine input is processed by anSRF discussed below. The output of each SRF is confined in a narrow bandof frequencies centered about the local oscillator frequency. Thesefrequencies can be readily spaced so as to not to interfere with eachother and occupy only a symbol (1 microsecond) in time. Thus, there is asignificant increase in channel throughput after these signals aresummed. The signal-to-noise ratio of this signal is greatly enhancedover the noise signal 809. The super-resonant frequency filter 805 shownin FIG. 8 is discussed in more detail with reference to FIG. 10 below.In one embodiment of the invention, the local oscillator is the signalsource. A branch of the local oscillator is modulated by the data at thesymbol rate.

[0041]FIG. 7 shows the sine input for several different levels of input.FIG. 8 shows the corresponding outputs of the system. The sine input hassharp peaks at about 250 and 750 nanoseconds, corresponding to thenegative and positive peaks of the sine waves. As shown in FIG. 8, thewaveform is the summation or accumulation of a series of time samples ofthe input signals of FIG. 7. In one embodiment, there may be up to100,000 of these samples per symbol interval. In the frequency domain,each of these pulses occupies a very wide spectrum while only a portionof the spectrum that occupies the transmission channel gets transmitted.As the pulses are added together, the resulting spectrum shrinks. Thein-phase portions of the spectrum of each pulse add while theout-of-phase portions do not. The SRF unit restricts transmission toin-phase signals only at a specific frequency. The SRF is not limited toa single frequency but a narrow band of frequencies. As evident fromFIG. 8, signals at multiple frequencies can be used. The multiplefrequencies will not interfere with each other due to the narrowbandwidth of each signal.

[0042] A receiver, as shown in FIG. 9, is used to decode the receivedsignal transmitted by the transmitter. The receiver decodes the signaltransmitted within the transmitted bit. The receiver contains an SRFunit operating at the same frequency and synchronized to a common timereference. The SRF operates for example, at F₀ (see, FIG. 6, items 801,805). The time reference can be transmitted to the receiver without anysignificant increase in bandwidth. The output of the receiver is similarto the output of the transmit SRF as shown in FIG. 8. In one embodiment,a time synchronized threshold detector is used to convert the digitalsymbol corresponding to the sender's input symbol.

[0043] The receiver input is the signal and noise as well as a synchsignal 1101. This signal is input into SRFs 1102 and 1103. If there areadditional data streams, additional SRFs can be added. Each SRF has alocal oscillator operating at the frequency necessary to decode the datastream. The output of the SRF is then input into detector 1104. Theoutput of detector 1104 is the desired data stream.

[0044] The super-resonant filter has advantages over prior art spikefilters. One such advantage is the fast settling time of thesuper-resonant filter. The prior art spike filters take a long time tosettle. For example, a 1 hertz narrow pass filter requires one secondbefore its operation is complete. The SRF transmits only a singlefrequency at a specific phase of a sinusoidal input. The inputs mayinclude noise which is itself a compilation of signals. The input mayalso include functions of sine waves such as the integral of a sine orcosine wave.

[0045] The system operates on samples of the input signal. The sampleintervals are much smaller than the period of the complete operation.The process therefore operates over one symbol period or less so thereis no coherent relationship between successive symbol periods. Eachsymbol period starts afresh, although within the symbol period there maybe several frequencies which may be recoverable by separate filters.

[0046] As shown in FIG. 10, 1001 comprises the input signals, which aresymbols. The signals consist of a cycle of sine waves which differ eachsymbol period. The sine waves are sampled n times a symbol. Amplitudeadjustor 1002 adjusts the amplitude of signal 1001 having a frequencyF₀. The amplitude adjusted signal is presented to adder 1003 which sumsthe input time samples and the feedback samples. A squaring function isperformed in circuit 1004. Circuit 1004 multiplies the output of summer1003 by itself thereby producing the square of the summer output. Theoutput of circuit 1004 is a voltage with a frequency of twice the inputfrequency F₀. Local oscillator 1005 oscillates with a frequency F₀. Inone embodiment, the local oscillator is phase locked to the transmitterfrequency and phase. The output of the local oscillator 1005 and outputof squaring circuit 1004 are multiplied by multiplier 1006. Multiplier1006 provides an output 2F₀−F₀=F₀ and 2 F₀+F0=3 F₀ from inputs 2 F₀ andoscillator F₀. The output of multiplier 1006 is presented to subtractor1007 which is a linear subtractor which is phase and amplitude adjustedto cancel the 3 F₀ product of multiplier 1006. In one embodiment, athird harmonic generator 1008 generates the third harmonic of F₀ or, itmay be independently generated, but phase tied to multiplier 106. In oneembodiment, the third harmonic is cancelled at the transmitter, not thereceiver. Further, amplitude adjustor 1009 may be used to cancel thesignal from third harmonic generator 1008. The output of subtractor 1007is presented to square root circuit 1010. Circuit 1010 provides thesquare root of the amplitude of the output of circuit 1006. The input tocircuit 1010 is also presented to sign extractor 1011. Sign extractor1011 extracts the sign of the signal output from multiplier 1006 andthis sign is used to multiply the output of the square root inmultiplier 1012. The output of multiplier 1012 is also fed back throughdelay unit 1013 which delays the output sample pulses one sample period(i.e., 1/n). Amplitude adjustor 1015 then adjusts the sample attitudefor proper addition.

[0047] In circuit 1004, the x² operation provides sinusoids whose anglehas doubled, i.e., x=a sin a becomes x²=a² sin² a or a²(sin 2a−1). Whenthis signal is multiplied by the output of the local oscillator 1005outputting a signal of sine a, the result is a² sine a. This signal isexactly in phase with the input signal.

[0048] It should be noted that the sample of the signal is also in phasewith the local oscillator F₀. When the sample is delayed by one sampleperiod (1/n), it adds to the newly received sample period. However,before this addition takes place, the square root of a²(sin 2a−1)sine awhich results in a sin a. Because the square root process removes thesign, it is necessary to ensure that the output of the square rootprocess has the input sign restored.

[0049] When the local oscillator frequency is not exactly equal to theincoming frequency and phase, the operation is different. When the localfrequency angle is a+Φ, the output angle is 2a−a−Φ which equals a−Φ andwhen the local frequency angle is a−Φ, the output angle is a+Φ sowhether the incoming signal frequency is above or below the desiredlocally selected frequency, the feedback delayed signal is out of phasewith the input signal and does not add.

[0050] The addition of the samples amounts to an integration of theselected sinusoidal wave resulting in a peak signal of n/2π. The sampleamplitudes are large over a 30° interval. Thus, the integration is mostintense near the peaks of the input signal.

[0051] The integration of sequential sampling pulses requires that thespectrum of each overlap the other at the information channel frequency.Only this spectrum is needed to develop and transfer the informationacross the channel. Thus, the entire spectrum of the sampling pulse isnot required. A Z-transformation analysis leads to the same results.

[0052]FIG. 10a shows an alternate embodiment of an SRF to reduce thethird harmonic from the output signal. As shown, in place of a thirdharmonic generator 1008 the absolute value (1032) of the localoscillator is multiplied at multiplier 1020 with the output of adder1003. The output of multiplier 1020 is then reintroduced using adders1026 and 1028 to reduce the third harmonic in the output signal.

[0053] In another embodiment of the invention, an exploded suppressedcarrier SRF (ESC-SRF) shown in FIG. 11 can be used. The ESC-SRF differsfrom the previously discussed SRF in that the square root and signextract functions are replaced with a variable amplitude localoscillator subtractor block. This has the effect of preventing the localoscillator from bleeding into the output stage of the ESC-SRF.Additionally, the positive feedback loop has been opened and explodedinto a number of daisy-chained individual stages. Each of the individualstages is akin to a closed loop iteration discussed above.

[0054] The ESC-SRF eliminates the need for the square root function. Inone embodiment, the ESC-SRF uses a lower clock rate digital circuitrythan the previous SRF architecture and the number of daisy chain stagescan be lower than the number of per-symbol iterations in the SRF.Additionally, the ESC-SRF can be used in the receiver side therebyeliminating the need for transmit side additional circuitry includinganother SRF or ESC-SRF. As shown in FIG. 12, the single stage ESC-SRF isshown. As should be noted in FIG. 12, the positive feedback loop andsquare root modules are removed. Multiple ESC-SRFs can be combined asshown in FIG. 13 which can include n stages of the ESC-SRF.

[0055] In one embodiment of the circuit shown in FIG. 13, there is alast-stage LPF its 3dB point as approximately 2ω₀. This filter having arelatively small delay would eliminate all high-frequency componentsresulting from the various ESC-SRF stages. These components all start at3ω₀ and above.

[0056] The equations below derive the open-loop behavior, and withoutthe square root function referring to FIG. 12.

IN=cos(ωnΔt)  (1)

LO=cos(ω₀ nΔt)  (2)

A=IN(feedback loop is open)  (3)

B=A ²=cos² (ωnΔt)  (4)

[0057] Using the identity below, substitute into eq. (4)

cos² (a)=(½)+(½)cos(2a)

B=(½)+(½)cos(2ωnΔt)  (5)

C=B*LO={(½)+(½)cos(2ωnΔt)}*cos(ω₀ nΔt)  (6)

C=(½)cos(ω₀ nΔt)+(½)cos(2ωnΔt)*cos(ω₀ nΔt)  (7)

[0058] Substituting the following into eq. (7)

ω=ω₀+Δω

C=(½)cos(ω₀ nΔt)+(½)cos(2(ω₀+Δω)nΔt)*cos(ω₀ nΔt)  (8)

[0059] Using the identity below, substitute for the second term of eq.(8)

cos(a)*cos(b)=(½){cos(a+b)+cos(a−b)}

[0060] where a=2(ω₀+Δω)nΔt

[0061] and b=ω₀nΔt, we get

C=(½)cos(ω₀ nΔt)+(½)(½){cos(2(ω₀+Δω)nΔt+ω ₀ nΔt)+cos(2(ω₀+Δω)nΔt−ω ₀nΔt)  (9)

[0062] Simplifying the above, we get

C=(½)cos(ω₀ nΔt)+(¼)cos(3ω₀ nΔt+2ΔωnΔt)+(¼)cos(ω₀ nΔt+2ΔωnΔt)  (10)

[0063] Finally, and assuming that we subtracted o.5*LO amplitude at thisstage, then

D=C−(½)^(i)cos(ω₀ nΔt)  (11)

[0064] The exponent “i” determining the LO-subtraction is removed blow,as we are analyzing a single stage. The value of that exponent is fixedfor each stage. Refer to FIG. 13,

[0065] Substituting eq. (1 1) into eq. (10), and simplifying, we get

D=(¼)cos(3ω₀ nΔt+2ΔωnΔt)+(¼)cos(ω₀ nΔt+2ΔωnΔt)  (12)

[0066] Since we are not using the square root block, then the output andD are the same.

[0067] Equation (12) shows that for an input ω₀+Δω, the output resultsinto two frequency components, one at a very high frequency of (3ω₀+2Δω) and the other “baseband” component (ω₀+2Δω).

[0068] One of the fundamental operations of the G function in theESC-SRF is to take-in an “off-center” frequency, and to shift thatfrequency further away from the center; hence the input (ω₀+Δω) becomesa (ω₀+2Δω) component, having been shifted in frequency by an additional(Δω) in the first stage. The amount of frequency shift is equal to(2^(i)Δω) for i-stages. Additionally, the amplitude of thecontinuously-shifted result of an off-center input is attenuated by afactor about 2^(i), although this attenuation is also the same forcenter-frequency case. Hence, the operation of the ESC-SRF is differentfrom the SRF also in that the amplitude of the center-frequency does notbuild-up, but rather that the off-center frequency is shifted intohigher frequencies. This allows a conventional low pass filter to reduceits amplitude drastically.

[0069] For the case where the input is at the center frequency, we haveΔω=0, ω=ω₀. In this case, equation (12) reduces to:

D=(¼)cos(3ω₀ nΔt)+(¼)cos(ω₀ nΔt)  (13)

[0070]FIG. 14 shows the spectrum at each node of the ESC-SRF when i=1and w=0. FIG. 15 shows the spectrum at each node of the ESC-SRF when i=1and w>w0.

[0071]FIGS. 16 and 17 show a frequency domain graphical representationof the results of each step within a single-stage of an ESC-SRF foriteration number 2, for both cases of input frequency. The inputs toeach of these stages is comprises more complex summation of twosinusoids, which results from the first stage's processing.

[0072] First, a generalized 2-sinusoid (called J and K) equation whensquared for node B is derived.

A=IN=cos(J)+cos(K)  (20)

B=(cos(J)+cos(K) )²  (21)

B=cos²(J)+2cos(J)*cos(K)+cos²(K)  (22)

[0073] Using the identity cos²(X)=½*(1+cos2X), we get

B=½+½cos(2J)+2cos(J)*cos(K)+½+½cos(2K)  (23)

[0074] Using the identity cos(X)*cos(Y)=½(cos(X+Y) ), and simplifying,we get

B=1+½cos(2J)+½cos(2K)+cos(J+K)+cos(J−K)

[0075] It should be noted that these are fixed factors.

[0076] The above equation is used in the graphical representation toshow the spectrum of node B for the second iteration. Note that thefirst time is DC, then next 2 terms are the double-frequency cases, thenext term is a high frequency case, and finally, the last termrepresents a component that generally falls within the band of interest.

[0077] The LO subtractor module now subtracts an amount of 1.25 time theinput baseband amplitude (or, in absolute terms, 0.3125). Thedetermination of the LO reduction in each stage has not yet been fullyderived. It appears to have the form of

[0078] LO-reduction=0.25+0.25^(n)

[0079] Focusing on the “baseband” output of the second stage, therelative amplitude of the two cases are substantially equal, but theoff-center input's offset is shifted by another factor of 2 to its newfrequency of ω₀+4Δω. This trend continues follows:

ω(n)=ω₀+2Δω

[0080] Note that the output amplitude is now smaller, but substantiallyequal for both “baseband” frequency components.

[0081] This third stage analysis of the ESC-SRF is somewhat morecomplex, given that its input now has either 4 or 5 sinusoidal elements.The main ones being the desired baseband signal and others no lower than3ω₀. If the higher frequency elements are eliminated, although such anintermediate LPF is not shown in the block diagram, then the resultingoutput for the center frequency case would be a yet-lower amplitude ω₀components along with its attendant high frequency elements, and theoff-center frequency case would yield a baseband term of ω₀+8Δω.

[0082] After a sufficient number of stages, the xΔω component itselfbecomes a high-frequency term that the LPF eliminates.

[0083] It should be noted that in operation, the bit error rate of theSRF does not improve significantly as n increases even though the outputsignal amplitude does increase with n because the noise level at theoperating frequency increases correspondingly. Therefore, the outputsignal-to-noise ratio does not improve.

[0084] The signal-to-noise ratio performance can be improved at thereceiver using a canceller circuit. Signals that are received but notprocessed by an SRF unit at the transmit point are essentially sinusoidsignals. Use of a canceller in the receiver can provide outputs that arefree of interfering channels, i.e., other data streams that don'toperate at the specific frequency chosen for the desired data stream.However, such an output is not free of noise signals occurring at thedesired stream frequency.

[0085] The noise signal can be greatly reduced by the use of an SRF unitoperating at the desired frequency. Such a unit discriminates on a timeor phase basis between signal and noise. The noise signal, though at thesame frequency as the signal, is very infrequently at the same phase asthe signal. In fact, it is likely to be at the same phase 1 out of 1000times or less. The effectively increases the signal-to-noise ratio by acorresponding amount approximately 20-30 dB. The noise improvement canalso augment the improvement obtained from the transmit SRF.

[0086]FIG. 18 is a block diagram of a canceling receiver. The cancelingreceiver of FIG. 18 utilizes a noise canceller circuit, which can beeffective for a variety of input situations. It should be noted that theinput generally consists of signals and Gaussian or Raleigh noise. Thesignal, noise and synch signals are input into an interpolator 1800. Theoutput from interpolator 1800 is presented to at least one SRF atfrequency F₀. The SRF at F₀ 1801 also receives as an input a localoscillator F₀ 180°. The local oscillator does not have to be 180° out ofphase if 1804 is an adder. The output of SRF 1801 is the signal andnoise minus the signal plus noise at F₀. This signal is then presentedto a subtractor which subtracts the output from interpolator a secondSRF operating in f_(0+Δ). The SRF at f_(0+Δ)is combined at adder 1804 sothat the noise signal is effectively cancelled. Δ is chosen so that theoutput noise closely correlates with that of 1801 but sufficiently largeto reduce the noise content of the SRF. Additionally, other SRFs can beto decode other frequencies. In another embodiment, the samples aresubtracted during each iteration.

[0087] The SRF is useful in the receiver shown in FIG. 18. The receiverreceives a signal and noise signal. A noise canceller band on the SRF isused to cancel the incoming noise to improve the signal-to-noise ratioin addition to the imprint in the signal-to-noise ratio provided by atransmitter using an SRF. FIG. 8 represents the signal transmitted by asender that employs the SRF unit. This signal provides an improvedsignal-to-noise ratio by virtue of transforming a pulse signal into apeak signal which occupies a reduced spectrum and time interval. Thesignals and the noise are sampled in the interpolation unit 1800 at arate much higher than the symbol rate. A synch time reference is alsoprovided over the transmission medium. The sampled signal and noisesignals are provided to various reverse SRF units. Each of these SRFunits is operating at a different frequency within the channel band.

[0088] Using the same wave, the disclosed invention transforms thatpulse and changes the spectrum to almost a line. Thus, approximately 16Mbits can be processed in 1 microsecond. When each bit is spaced at 10hertz, each sample of a vector acts as the whole vector. The signalappears as a spike but it is a result of the integration of manysamples.

[0089] The inventive digital system is a transfer function that causes apossible differential phase shift for various input frequencies. Eachfrequency is processed independently. The transfer function is repeatednumerous times within each sample period. The result is an output whereeach input frequency is discriminated from one another. The repetitionis performed in a closed loop, i.e., the SRF, a sequential series ofcircuits, i.e., ESC-SRF, or another implementation of a forward transferfunction with a cumulative property.

[0090] The circuit implementation for the various embodiments can bedone using single or multiple physical circuits. Design choices willdictate the use of feedback looping, daisy-chaining, pipelining, orother methods where circuit complexity and operating frequency areconsidered. Additionally, DSP chips or FPGAs can be used to do theprocessing which would include the accumulation of differential phase.Further, a processor programmed to perform the apparatus algorithm canbe used to implement the disclosed system.

[0091] Although the present invention has been described in relation toparticular embodiments thereof, many other variations and other useswill be apparent to those skilled in the art. It is preferred,therefore, that the present invention be limited not by the specificdisclosure herein, but only by the scope of the claims.

What is claimed is:
 1. A method of increasing digital data throughput ofa channel comprising: inputting a digital data signal at a frequency;sampling the digital data signal at a fraction of the frequency; andestablishing a digital feedback loop for deriving a phase shift for eachsample during each repetition and accumulating the phase shift ofsubsequent samples with previous samples during at most a single periodof the frequency.
 2. An apparatus for increasing digital data throughputof a channel comprising: an input for inputting a digital data signal ata frequency; a sampler for sampling the digital data signal at afraction of the frequency; and an accumulator for accumulating phaseshift of the samples with multiple iterations during at most a singleperiod of the frequency.
 3. A method of increasing digital datathroughput of a channel comprising: inputting a digital data signal at afrequency; sampling the digital data signal at a fraction of thefrequency; and accumulating phase shift of the samples with multipleiterations during at most a single period of the frequency.
 4. Atransmission system for reduced energy transmission comprising: meansfor simultaneously encoding a first group of parallel binary bits into avoltage amplitude signal having a first phase, a superressonant filterhaving a local oscillator operating in phase with the voltage amplitudesignal, the superressonant filter receiving the voltage amplitude signaland accumulating phase shift of samples with multiple iterations duringat most a single period of a frequency and outputting a data signal. 5.The transmission of claim 4, further comprising: an amplitude adjusterfor adjusting the amplitude of the voltage amplitude signal.
 6. Thesuperressonant filter of claim 4, further comprising: an adder foradding the voltage amplitude signal with a feedback signal; a squaringcircuit for squaring the output of the adder; a first multipliermultiplying the adder output with an output of the local oscillator; asign extracter to extract the sign of the first multiplier output; asquare root circuit for taking the square root of the first multiplieroutput; a second multiplier for multiplying the output of the squareroot circuit and the output of the sign extracter; and a delay circuitfor delaying the output of the second multiplier to produce the feedbacksignal.
 7. The delay circuit of claim 6 wherein the delay is one sampleperiod.
 8. The superressonant filter of claim 4, further comprising: afirst adder for adding the voltage amplitude signal with a feedbacksignal; a squaring circuit for squaring the output of the adder; a firstmultiplier multiplying the adder output with an output of the localoscillator; a second adder for adding an output of the first multiplierand an amplitude adjusted output of the local oscillator; a signextracter to extract the sign of the second adder output; a square rootcircuit for taking the square root of the second adder output; a secondmultiplier for multiplying the output of the square root circuit and theoutput of the sign extracter; and a delay circuit for delaying theoutput of the second multiplier to produce the feedback signal.
 9. Thesuperressonant filter of claim 4, further comprising: a squaring circuitfor squaring the the voltage amplitude signal; a first multipliermultiplying the adder output with an output of the local oscillator; andan adder for adding an output of the first multiplier and an amplitudeadjusted output of the local oscillator.
 10. A superressonant filtercomprising: an adder for adding a voltage amplitude signal with afeedback signal; a squaring circuit for squaring the output of theadder; a first multiplier multiplying the adder output with an output ofthe local oscillator; a sign extracter to extract the sign of the firstmultiplier output; a square root circuit for taking the square root ofthe first multiplier output; a second multiplier for multiplying theoutput of the square root circuit and the output of the sign extractor;and a delay circuit for delaying the output of the second multiplier toproduce the feedback signal.
 11. The superresonant filter of claim 10wherein the superresonant filter has no inductive component.
 12. Asystem for increasing digital data throughput of a channel comprising:input means for inputting a digital data signal at a frequency; samplingmeans for sampling the digital data signal at a fraction of thefrequency; feedback means for deriving a phase shift for each sampleduring each repetition and adding subsequent samples to a summation ofprevious samples during at most a single period of the frequency.
 13. Amethod improving signal to noise ratio and bit error rate usingcompressed highly correlated noise in adjacent close frequency channelto cancel noise in signal carrying channel, comprising: inputting adigital data signal at a first frequency; sampling the digital datasignal at a fraction of the first frequency; accumulating a phase shiftof the samples with multiple iterations during at most a single periodof the frequency; sampling the digital data signal at a fraction of asecond frequency; and accumulating phase shift of the samples withmultiple iterations during at most a single period of the secondfrequency; and subtracting the accumulated samples of the secondfrequency from the samples of the first frequency.
 14. An apparatus forincreasing digital data throughput of a channel comprising: an input forinputting a digital data signal at a frequency; a sampler for samplingthe digital data signal at a fraction of the frequency; an accumulatorfor accumulating phase shift of the samples with multiple iterationsduring at most a single period of the frequency; and means for removingout of band signal.